Tools

LEADER 01934cam 2200397 a 4500

001 ocn268793465;

003 OCoLC;

005 20141212051745.0;

008 081124s2009 enka b 001 0 eng ;

010 a| 2008050653;

015 a| GBA9151322| bnb;

016 7 a| 0149037222| Uk;

019 a| 305159057;

020 a| 9780521859721 (hardback);

020 a| 0521859727 (hardback);

035 a| (Sirsi) o268793465;

035 a| (OCoLC)268793465;

049 a| EREE;

050 00 a| TK7874.58b| .P73 2009;

082 00 a| 621.3815/482| 22;

245 00 a| Practical design verification /c| edited by Dhiraj K. Pradhan, Ian G. Harris.;

260 a| Cambridge, UK ;a| New York :b| Cambridge University Press,c| 2009.;

300 a| xi, 276 pages :b| illustrations ;c| 26 cm;

336 a| text2| rdacontent;

337 a| unmediated2| rdamedia;

338 a| volume2| rdacarrier;

504 a| Includes bibliographical references and index.;

505 0 a| Model checking and equivalence checking / Masahiro Fujita -- Transaction-level system modeling / Daniel Gajski and Samar Abdi -- Response checkers, monitors, and assertions / Harry Foster -- System debugging strategies / Wayne H. Wolf -- Test generation and coverage metrics / Ernesto Sánchez, Giovanni Squillero, and Matteo Sonza Reorda -- SystemVerilog and Vera in a verification flow / Shireesh Verma and Ian G. Harris -- Decision diagrams for verification / Maciej Ciesielski, Dhiraj K. Pradhan, and Abusaleh M. Jabir -- Boolean satisfiability and EDA applications / Joao Marques-Silva.;

650 0 a| Integrated circuitsx| Verification.=| ^A399142;

700 1 a| Pradhan, Dhiraj K.=| ^A1198265;

700 1 a| Harris, Ian G.=| ^A1209182;

994 a| C0b| ERE;

596 a| 1;

998 a| 2277446;

999 a| TK7874.58 .P73 2009w| LCc| 1i| 30372015422006d| 4/3/2013e| 7/12/2010f| 4/3/2013g| 3l| JGESm| JOYNERr| Ys| Yt| JGESBKu| 6/16/2010x| BOOKz| JSTACKSo| .STAFF. jmpl;

Practical design verification / edited by Dhiraj K. Pradhan, Ian G. Harris.

Other author	Pradhan, Dhiraj K.
Other author	Harris, Ian G.
Format	Book
Publication Info	Cambridge, UK ; New York : Cambridge University Press, 2009.
Description	xi, 276 pages : illustrations ; 26 cm
Subjects	Integrated circuits--Verification.

Contents	Model checking and equivalence checking / Masahiro Fujita -- Transaction-level system modeling / Daniel Gajski and Samar Abdi -- Response checkers, monitors, and assertions / Harry Foster -- System debugging strategies / Wayne H. Wolf -- Test generation and coverage metrics / Ernesto Sánchez, Giovanni Squillero, and Matteo Sonza Reorda -- SystemVerilog and Vera in a verification flow / Shireesh Verma and Ian G. Harris -- Decision diagrams for verification / Maciej Ciesielski, Dhiraj K. Pradhan, and Abusaleh M. Jabir -- Boolean satisfiability and EDA applications / Joao Marques-Silva.
Bibliography note	Includes bibliographical references and index.
LCCN	2008050653
ISBN	9780521859721 (hardback)
ISBN	0521859727 (hardback)

Availability

Library	Location	Call Number	Status	Item Actions
Joyner	General Stacks	TK7874.58 .P73 2009	✔ Available	Place Hold

Practical design verification / edited by Dhiraj K. Pradhan, Ian G. Harris.

Click here for more information about this title

Availability