Innovative Architecture for Future Generation High-Performance Processors and Systems Postproceedings, 1998 International Workshop
| Author/creator | Veidenbaum, Alex Editor |
| Other author | Joe, Kazuki Editor |
| Other author | Maui High-Performance Computing Center Staff. |
| Other author | IEEE Xplore (Online service) |
| Format | Electronic |
| Publication Info | Los Alamitos : IEEE Computer Society Press |
| Description | 180 p. ill 28.000 x 022.000 cm. |
| Supplemental Content | Full text available from IEEE Conference Proceedings Archive |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) Conference Proceedings |
| Subjects |
| Summary | Annotation A selection of 14 of the 19 papers presented at the workshop cover measuring, understanding, and optimizing application and system performance; prediction and speculative execution; interactions between hardware and software in architecture design; compilation; and parallel system architecture. Specific topics include system support for the dynamic optimization of application performance, a speculative multi-threading with selective multi-path execution, new methods for exploiting program structure and behavior in computer architecture, implementing a non-strict functional programming language V on a threaded architecture EARTH, and the architecture of a parallel computer Cenju-4. Only authors are indexed. Annotation copyrighted by Book News, Inc., Portland, OR |
| Access restriction | Available only to authorized users. |
| Technical details | Mode of access: World Wide Web |
| Genre/form | Electronic books. |
| LCCN | 99060129 |
| ISBN | 9780769501253 |
| ISBN | 0769501257 (Trade Cloth) Active Record |
| Standard identifier# | 9780769501253 |
| Stock number | 00029433 |
Availability
| Library | Location | Call Number | Status | Item Actions |
|---|---|---|---|---|
| Electronic Resources | ✔ Available |