2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
| Author/creator | IEEE Computer Society Staff |
| Other author | IEEE Xplore (Online service) |
| Format | Electronic |
| Publication Info | Los Alamitos : IEEE Computer Society Press Piscataway : IEEE [Distributor] |
| Description | 438 p. 28.000 x 022.000 cm. |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) Conference Proceedings |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) |
| Subjects |
| Summary | Annotation This volume includes 45 papers presented at the October 2000 symposium, covering yield analysis, modeling, and enhancement; fault tolerance interconnections and systems; reconfiguration and repair; error coding; online testing; testing and BIST techniques; and fault injection techniques and environments. The authors, professionals and academics from 18 different companies, offer papers on specific topics such as quality-effective repair of multichip module systems, evaluations of burst error recovery for VF arithmetic coding, and test cost minimization for Hybrid BIST. A thorough subject index is lacking. Annotation copyrighted by Book News, Inc., Portland, OR |
| Access restriction | Available only to authorized users. |
| Technical details | Mode of access: World Wide Web |
| Genre/form | Electronic books. |
| ISBN | 9780769507194 |
| ISBN | 0769507190 (Trade Cloth) Active Record |
| Standard identifier# | 9780769507194 |
| Stock number | 00029433 |