Innovative Architecture for Future Generation High-Performance Processors and Systems 1999 International Workshop on Innovative Architectures (IWIA '99), November 1-3, 1999, Maui, Hawaii
| Author/creator | Veidenbaum, Alex Author Editor |
| Format | Electronic |
| Publication Info | Los Alamitos : IEEE Computer Society Press Piscataway : IEEE [Distributor] |
| Description | 130 p. ill 28.000 x 022.000 cm. |
| Supplemental Content | Full text available from IEEE Conference Proceedings Archive |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) Conference Proceedings |
| Subjects |
| Other author/creator | Nakashima, Hiroshi Author Editor |
| Other author/creator | National Science Foundation Staff. |
| Other author/creator | Maui High Performance Computing Center Staff. |
| Other author/creator | IEEE Xplore (Online service) |
| Summary | Annotation Contains 11 papers presented at the November 1999 workshop that discussed computer architecture, compilers, and applications for high- performance systems. Some of the topics are near fine grain parallel processing using static scheduling on single ship multiprocessors, PIM architectures to support petaflops-level computation in the HTMT machine, evaluation of compiler-assisted software DSM schemes for a workstation cluster, and a heuristic approach to improve a branch and bound based program partitioning algorithm. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR |
| Access restriction | Available only to authorized users. |
| Technical details | Mode of access: World Wide Web |
| Genre/form | Electronic books. |
| LCCN | 00103357 |
| ISBN | 9780769506500 |
| ISBN | 076950650X (Trade Cloth) Active Record |
| Standard identifier# | 9780769506500 |
| Stock number | 00029433 |