Defect and Fault-Tolerance in VLSI Systems, 1993 Workshop
| Author/creator | Institute of Electrical and Electronics Engineers, Inc. Staff |
| Other author | IEEE Xplore (Online service) |
| Format | Electronic |
| Publication Info | Los Alamitos : IEEE Computer Society Press |
| Description | 352 p. |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) Conference Proceedings |
| Supplemental Content | Full text available from IEEE Conference Proceedings Archive |
| Supplemental Content | Full text available from IEEE Electronic Library (IEL) |
| Subjects |
| Summary | Annotation The proceedings of the workshop held in Venice, Italy in October 1993 comprise papers on topics in fault-tolerant architectures and structures, fault tolerance through reconfiguration, yield modeling, design for yield, physical analysis, testable architectures, testing, self-checking and error correction architectures, and fault tolerance in analog systems. No index. Annotation copyright by Book News, Inc., Portland, OR |
| Access restriction | Available only to authorized users. |
| Technical details | Mode of access: World Wide Web |
| Genre/form | Electronic books. |
| ISBN | 9780818635021 |
| ISBN | 0818635029 (Trade Cloth) Out of Stock Indefinitely |
| Standard identifier# | 9780818635021 |
| Stock number | 3502 00029433 |
Availability
| Library | Location | Call Number | Status | Item Actions |
|---|---|---|---|---|
| Electronic Resources | ✔ Available |