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008 180416s2018 gw a sb 001 0 ger d;

010 a| 2018941440;

020 a| 9783110582567 (pbk.);

020 z| 9783110582833 (epub);

020 z| 9783110583069 (pdf);

035 a| (WaSeSS)ssj0002071547;

040 a| DLCb| engc| DLCd| WaSeSS;

042 a| pcc;

049 a| EREEa| NEHH;

050 00 a| TK7895.M5b| W38 2018;

100 1 a| Wecker, Dieter.?| UNAUTHORIZED;

245 10 a| Prozessorentwurf mit VHDLh| [electronic resource] :b| Modellierung und Synthese eines 12-Bit-Mikroprozessors /c| Dieter Wecker.;

246 14 a| Prozessor Entwurf mit VHDL;

260 a| Berlin ;a| Boston :b| De Gruyter Oldenbourg,c| [2018];

300 a| viii, 210 pages :b| illustrations ;c| 24 cm;

490 0 a| De Gruyter Studium;

504 a| Includes bibliographical references (page 207) and index.;

506 a| Available only to authorized users.;

538 a| Mode of access: World Wide Web;

546 a| In German.;

650 0 a| Microprocessorsx| Design and constructionx| Data processing.=| ^A1005572;

650 0 a| VHDL (Computer hardware description language)=| ^A855836;

650 0 a| Computer hardware description languages.=| ^A671339;

655 0 a| Electronic books.=| ^A491897;

856 40 z| Full text available from Ebook Central - Academic Completeu| https://ebookcentral.proquest.com/lib/eastcarolina/detail.action?docID=5505278;

949 a| CLICK ON WEB ADDRESSw| ASISh| JOYNER188;

949 a| CLICK ON WEB ADDRESSw| ASISh| HSL77;

949 a| CLICK ON WEB ADDRESSw| ASISh| JMUSIC60;

596 a| 1 3 4;

998 a| 5181355;

999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 5181355-1001l| JNETm| JOYNERr| Ys| Yt| JNESSBKu| 9/19/2019x| EBOOKz| JERESOURCE;

999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 5181355-2001l| HSLELECm| HSLr| Ys| Yt| HEBKu| 9/19/2019x| EBOOKz| HERESOURCE;

999 a| CLICK ON WEB ADDRESSw| ASISc| 1i| 5181355-3001l| MNETm| JMUSICr| Ys| Yt| MNESSBKu| 9/19/2019x| EBOOKz| JERESOURCE;

Prozessorentwurf mit VHDL Modellierung und Synthese eines 12-Bit-Mikroprozessors / Dieter Wecker.

Author/creator	Wecker, Dieter
Format	Electronic
Publication Info	Berlin ; Boston : De Gruyter Oldenbourg, [2018]
Description	viii, 210 pages : illustrations ; 24 cm
Supplemental Content	Full text available from Ebook Central - Academic Complete
Subjects	Microprocessors--Design and construction. --Data processing. VHDL (Computer hardware description language) Computer hardware description languages.

Cover title	Prozessor Entwurf mit VHDL
Series	De Gruyter Studium
Bibliography note	Includes bibliographical references (page 207) and index.
Access restriction	Available only to authorized users.
Technical details	Mode of access: World Wide Web
Language	In German.
Genre/form	Electronic books.
LCCN	2018941440
ISBN	9783110582567 (pbk.)

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Prozessorentwurf mit VHDL Modellierung und Synthese eines 12-Bit-Mikroprozessors / Dieter Wecker.

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