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LEADER 03561cam 2200421Ii 4500

001 on1134445987;

003 OCoLC;

005 20211028114157.0;

008 200101t20202020sz a b 001 0 eng d;

020 a| 3030400204;

020 a| 9783030400200q| (hardcover);

035 a| (Sirsi) o1134445987;

035 a| (OCoLC)1134445987;

049 a| EREE;

050 4 a| TK7874b| .T544 2020;

092 a| 621.3815;

100 1 a| Tigelaar, Howard,e| author.?| UNAUTHORIZED;

245 10 a| How transistor area shrank by 1 million fold /c| Howard Tigelaar.;

246 3 a| How transistor area shrank by one million fold;

264 1 a| Cham, Switzerland :b| Springer,c| 2020.;

300 a| xxiv, 319 pages :b| illustrations (chiefly color) ;c| 25 cm;

336 a| textb| txt2| rdacontent;

337 a| unmediatedb| n2| rdamedia;

338 a| volumeb| nc2| rdacarrier;

520 a| "This book explains in layman's terms how CMOS transistors work. The author explains step-by-step how CMOS transistors are built, along with an explanation of the purpose of each process step. He describes for readers the key inventions and developments in science and engineering that overcame huge obstacles, enabling engineers to shrink transistor area by over 1 million fold and build billions of transistor switches that switch over a billion times a second, all on a piece of silicon smaller than a thumbnail. Written from a process integration point of view, in language accessible to a wide variety of readers; Provides readers with an understanding of how transistors work, how they are built, and the equipment used to build them; Describes the incredible science and engineering that was developed to keep transistor scaling on a Moore's Law trajectory - (transistor area reduced by half every 2 to 3 years); Enables readers to understand the engineering choices and compromises made while scaling transistors ever smaller, with the constraints that they switch ever faster and use less and less power."--Page 4 of cover.;

504 a| Includes bibliographical references and index.;

505 0 a| Integrated Circuit Revolutions -- Overview of Integrated Circuit Manufacturing -- Semiconductors, Diodes, Transistors, and Inverters -- Engineering MOS Transistors for High Speed and Low Power -- Parasitic MOS and Bipolar Transistors in CMOS ICs -- CMOS Inverter Manufacturing Flow : Part 1 Wafer Start Through Transistors -- CMOS Inverter Manufacturing Flow : Part 2 Transistors Through Single-Level Metal -- CMOS Inverter Manufacturing Flow : Part 3 Additional Levels of Metal Through PO -- The Incredible Shrinking IC : Part 1 Enabling Technologies -- The Incredible Shrinking IC : Part 2 FEOL Isolation Scaling and Transistor Scaling -- The Incredible Shrinking IC : Part 3 BEOL Aluminum Alloy Single and Multilevel Metal -- The Incredible Shrinking IC : Part 4 BEOL Low-K Intermetal Dielectrics and Multilevel Copper Metallization -- Anecdotes -- Wrap Up and What Is Next?;

650 0 a| Integrated circuitsx| Design and construction.=| ^A164350;

650 0 a| Transistorsx| Design and construction.=| ^A43650;

650 7 a| Integrated circuitsx| Design and construction.2| fast0| (OCoLC)fst00975545;

938 a| Brodartb| BRODn| 126347638;

938 a| YBP Library Servicesb| YANKn| 16596727;

994 a| C0b| ERE;

596 a| 1;

998 a| 5579512;

999 a| TK7874 .T544 2020w| LCc| 1i| 30372017373413d| 2/11/2022e| 9/22/2021l| JGESm| JOYNERr| Ys| Yt| JGESBKu| 3/21/2021x| BOOKz| JSTACKSo| .STAFF. jjlm;

How transistor area shrank by 1 million fold / Howard Tigelaar.

Author/creator	Tigelaar, Howard author.
Format	Book
Publication	Cham, Switzerland : Springer, 2020.
Copyright Date	©2020
Description	xxiv, 319 pages : illustrations (chiefly color) ; 25 cm
Subjects	Integrated circuits--Design and construction. Transistors--Design and construction.

Variant title	How transistor area shrank by one million fold
Contents	Integrated Circuit Revolutions -- Overview of Integrated Circuit Manufacturing -- Semiconductors, Diodes, Transistors, and Inverters -- Engineering MOS Transistors for High Speed and Low Power -- Parasitic MOS and Bipolar Transistors in CMOS ICs -- CMOS Inverter Manufacturing Flow : Part 1 Wafer Start Through Transistors -- CMOS Inverter Manufacturing Flow : Part 2 Transistors Through Single-Level Metal -- CMOS Inverter Manufacturing Flow : Part 3 Additional Levels of Metal Through PO -- The Incredible Shrinking IC : Part 1 Enabling Technologies -- The Incredible Shrinking IC : Part 2 FEOL Isolation Scaling and Transistor Scaling -- The Incredible Shrinking IC : Part 3 BEOL Aluminum Alloy Single and Multilevel Metal -- The Incredible Shrinking IC : Part 4 BEOL Low-K Intermetal Dielectrics and Multilevel Copper Metallization -- Anecdotes -- Wrap Up and What Is Next?
Abstract	"This book explains in layman's terms how CMOS transistors work. The author explains step-by-step how CMOS transistors are built, along with an explanation of the purpose of each process step. He describes for readers the key inventions and developments in science and engineering that overcame huge obstacles, enabling engineers to shrink transistor area by over 1 million fold and build billions of transistor switches that switch over a billion times a second, all on a piece of silicon smaller than a thumbnail. Written from a process integration point of view, in language accessible to a wide variety of readers; Provides readers with an understanding of how transistors work, how they are built, and the equipment used to build them; Describes the incredible science and engineering that was developed to keep transistor scaling on a Moore's Law trajectory - (transistor area reduced by half every 2 to 3 years); Enables readers to understand the engineering choices and compromises made while scaling transistors ever smaller, with the constraints that they switch ever faster and use less and less power."--Page 4 of cover.
Bibliography note	Includes bibliographical references and index.
ISBN	3030400204
ISBN	9783030400200 (hardcover)

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How transistor area shrank by 1 million fold / Howard Tigelaar.

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