Planar test structures for characterizing impurities in silicon / M.G. Buehler [and others].
| Other author | Buehler, Martin G. |
| Format | Book |
| Publication Info | Washington : U.S. Dept. of Commerce, National Bureau of Standards : For sale by the Supt. of Docs., U.S. Govt. Print. Off, 1976. |
| Description | v, 25 pages : illustrations ; 26 cm. |
| Subjects |
| Series | Semiconductor measurement technology National Bureau of Standards special publication ; 400-21 Semiconductor measurement technology. ^A428054 NBS special publication 400-21. ^A2701 |
| General note | "Presented as an invited paper ... at the Large-Scale Integration (LSI) Process Technology/Semiconductor Preparation and Characterization Session of the Electrochemical Society Meeting in Toronto, Canada on May 14, 1975." |
| Bibliography note | Includes bibliographical references. |
| LCCN | 75619390 |
| Govt. docs number | C 13.10:400-21 |
Availability
| Library | Location | Call Number | Status | Item Actions |
|---|---|---|---|---|
| Joyner | Fed Docs Stacks | C 13.10:400-21 | ✔ Available | Place Hold |