"Timing circuits" - ECU Libraries Catalog

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Cover image for ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems

ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems

by ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems
2002
Format: Book

Location	Call #	Status
Joyner - General Stacks	TK7868.T5 A37 2002	✔ Available

Cover image for Synchronization of digital telecommunications networks

Synchronization of digital telecommunications networks

by Bregni, Stefano
2002
Format: Electronic

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Cover image for Digital clocks for synchronization and communications

Digital clocks for synchronization and communications

by Kihara, Masami
2003
Format: Electronic

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Cover image for Nanometer frequency synthesis beyond phase-locked loop

Nanometer frequency synthesis beyond phase-locked loop

by Xiu, Liming
2012
Format: Electronic

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Cover image for Asynchronous on-chip networks and fault-tolerant techniques

Asynchronous on-chip networks and fault-tolerant techniques

by Song, Wei, 1983-
2022
First edition
Format: Electronic

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Cover image for Logic-timing simulation and the degradation delay model

Logic-timing simulation and the degradation delay model

by Bellido, Manuel J., 1964-
2006
Format: Electronic

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Cover image for Synchronization and arbitration in digital systems

Synchronization and arbitration in digital systems

by Kinniment, D. J.
2007
Format: Electronic

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Cover image for Skew-tolerant circuit design

Skew-tolerant circuit design

by Harris, David Money
2001
Format: Electronic

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Cover image for Timing

Timing

by Sapatnekar, Sachin S., 1967-
2004
Format: Electronic

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Cover image for Statistical analysis and optimization for VLSI

Statistical analysis and optimization for VLSI

by Srivastava, Ashish
2005
Format: Electronic

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