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Cover image for Planar test structures for characterizing impurities in silicon

Planar test structures for characterizing impurities in silicon

  • 1976
  • Format: Book
Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-21 ✔ Available
Cover image for Microelectronic test pattern NBS-3 for evaluating the resistivity-dopant density relationship of silicon

Microelectronic test pattern NBS-3 for evaluating the resistivity-dopant density relationship of silicon

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-22 ✔ Available
Cover image for Defects in PN junctions and MOS capacitors observed using thermally stimulated current and capacitance measurements, videotape script

Defects in PN junctions and MOS capacitors observed using thermally stimulated current and capacitance measurements, videotape script

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-26 ✔ Available
Cover image for Microelectronic test patterns

Microelectronic test patterns

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-6 ✔ Available
Cover image for A BASIC program for calculating dopant density profiles from capacitance-voltage data

A BASIC program for calculating dopant density profiles from capacitance-voltage data

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-11 ✔ Available
Cover image for Microelectronic test pattern NBS-4

Microelectronic test pattern NBS-4

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-32 ✔ Available
Cover image for A wafer chuck for use between -196 and 350⁰C

A wafer chuck for use between -196 and 350⁰C

Location Call # Status
Joyner - Fed Docs Stacks C 13.10:400-55 ✔ Available